File:Intel 8086 block scheme.svg

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Intel_8086_block_scheme.svg‎ (SVG file, nominally 800 × 650 pixels, file size: 40 KB)

[edit] Summary

Description

Schemat blokowy mikroprocesora Intel 8086. 1. Blok rejestrów ogólnego przeznaczenia, 2. Blok rejestrów segmentowych, 3. Dwudziestobitowy sumator, 4. Magistrala wewnętrzna C, 5. Kolejka rozkazów, 6. Układ sterowania, 7. Układ sterowania magistral, 8. Magistrala wewnętrzna A, 9. Jednostka Arytmetyczno-Logiczna (ALU), 10. Szyna adresowa, 11. Szyna danych, 12. Szyna sterowania, F. Rejestr znaczników, AX - akumulator, BX - rejestr bazowy, CX - rejestr zliczający, DX - rejestr danych, SP - wskaźnik stosu, BP - wskaźnik bazowy, SI - indeks źródła, DI - indeks celu, CS - segment kodu, DS - segment danych, SS - segment stosu, ES - segment dodatkowy, IP - wskaźnik rozkazów
Date

24 czerwca 2006
Source

Własne opracowanie na podstawie różnych źródeł
Author

Harkonnen2
Permission
(Reusing this image)

See below.
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I, Harkonnen2, the copyright holder of this work, has published or hereby publishes it under the following licenses:
GNU head Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A copy of the license is included in the section entitled "GNU Free Documentation License".

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Date/TimeThumbnailDimensionsUserComment
current21:18, 24 June 2007Thumbnail for version as of 21:18, 24 June 2007800×650 (40 KB)Harkonnen2 (talk | contribs) ({{Information |Description=Schemat blokowy mikroprocesora Intel 8086. 1. Blok rejestrów roboczych, 2. Blok rejestrów segmentowych, 3. Dwudziestobitowy sumator, 4. Magistrala wewnętrzna C, 5. Kolejka rozkazów, 6. Układ sterowania, 7. Układ sterowania)

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