Category:Semiconductor devices fabrication

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fabricación de circuitos integrados (es); fabrication des dispositifs à semi-conducteurs (fr); Pooljuhttehnoloogia (et); semiconductor device fabrication (en); Halbleitertechnik (de); fabricação de dispositivos semicondutores (pt); ساخت ادوات نیم‌رسانا (fa); 半导体器件制造 (zh); Yarı iletken cihaz imalatı (tr); 半導体デバイス製造 (ja); Планарна технология (bg); технологический процесс в электронной промышленности (ru); Fabrikasi semikonduktor (id); Pòaⁿ-tō-thé chong-tì chè-chō (nan); അർദ്ധചാലക ഉപകരണ ഫാബ്രിക്കേഷൻ (ml); fabricageproces halfgeleider (nl); अर्धचालकाः उत्पादनम् (sa); अर्धचालक उत्पादन (hi); 半导体器件制造 (wuu); fabbricazione dei dispositivi a semiconduttore (it); semiconductor device fabrication (en); تصنيع نبائط أشباه الموصلات (ar); Технологія виробництва напівпровідників (uk); fabricació de circuits integrats (ca) processo tecnologico atto alla creazione di circuiti integrati (it); 電子デバイスの集積回路を製造する方法 (ja); technischer Fachbereich (de); manufacturing process used to create integrated circuits (en); manufacturing process used to create integrated circuits (en) техпроцесс в электронной промышленности (ru); ファイナルテスト, 半導体製造プロセス (ja); Halbleiterherstellung, Halbleitertechnologie (de); fabricacao de dispositivos semicondutores (pt); semiconductor engineering, semiconductor fabrication (en); تصنيع أشباه الموصلات, صناعة أشباه الموصلات, تصنيع أجهزة أشباه الموصلات (ar); fabrication des semiconducteurs, procédés de fabrication des dispositifs à semiconducteurs, procedes de fabrication des dispositifs a semi-conducteurs, procédés de fabrication des dispositifs à semi-conducteurs (fr); fabricacion de circuitos integrados (es)

semiconductor device fabrication

manufacturing process used to create integrated circuits

Muat naik media

Contoh

engineering process,
manufacturing process (Peranti semikonduktor)

Lokasi

semiconductor fabrication plant

Kawalan kewibawaan
Q1570432

Subkategori

Yang berikut ialah 18 daripada 18 buah subkategori dalam kategori ini.

B

► Bonding‎ (2 K, 6 F)

C

► Chemical-mechanical polishing‎ (5 F)
► Cleanrooms‎ (9 K, 105 F)
► CMOS manufacture‎ (13 F)

D

► Doping (semiconductor)‎ (1 K, 31 F)

E

► Etching (microfabrication)‎ (1 K, 30 F)

F

► Fabless semiconductor companies‎ (11 K)
► Foundry semiconductor companies‎ (2 K)

I

► Integrated circuit dies‎ (2 K, 1 L, 678 F)

L

► Lithography (microfabrication)‎ (8 K, 57 F)

M

► Metalization (semiconductor devices)‎ (9 F)
► Microelectronics factories‎ (3 F)

P

► Packaging (microfabrication)‎ (1 K, 5 F)

S

► Semiconductor growth‎ (1 K, 16 F)

T

► Thermosonic bonding‎ (6 F)
► Thin-film deposition‎ (6 K, 58 F)
► Transistor dies‎ (67 F)

W

► Wafers‎ (2 K, 85 F)

Media-media dalam kategori "Semiconductor devices fabrication"

Yang berikut ialah 47 daripada 47 buah fail dalam kategori ini.

14 nm half-pitch multipatterning.png 910 × 375; 23 KB
4-fach-NAND-C10.JPG 967 × 1,206; 1.6 MB
7 nm litho options.png 859 × 582; 410 KB
Alu bridge.jpg 1,020 × 694; 214 KB
APD structure.svg 750 × 678; 27 KB
APD with Superlattice.svg 681 × 633; 8 KB
APD.png 400 × 290; 21 KB
Bell telephone magazine (1922) (14569544079).jpg 2,064 × 1,684; 1.34 MB
Bivar-logo.png 213 × 60; 3 KB
Buried zener structure-en.svg 521 × 283; 5 KB
Buried zener structure.svg 521 × 283; 16 KB
Buried zener vs npn epi.svg 521 × 616; 26 KB
Comparison semiconductor process nodes.svg 990 × 765; 74 KB
Diferencia estructura.PNG 552 × 240; 41 KB
DRAM burried capacitor configuration.svg 800 × 600; 4 KB
DRAM trench configuration 2.svg 512 × 512; 4 KB
DRAM trench structure configuration1 1.svg 512 × 512; 6 KB
DRAM trench structure configuration1.svg 800 × 600; 6 KB
Field-induced MRAM schematic ja.png 5,464 × 4,672; 132 KB
Framework for big data and analytics for semiconductors manufacturing.jpg 930 × 474; 127 KB
GeS CVD setup.png 1,254 × 607; 89 KB
GST CVD setup.png 467 × 233; 55 KB
GST CVD setup.tif 1,074 × 538; 220 KB
Illustration of C-V measurement.gif 322 × 308; 93 KB
KO fig21 applications Corelv11.png 1,748 × 1,799; 483 KB
Laser diode with case cut away.jpg 512 × 437; 118 KB
LELE challenge.png 472 × 353; 5 KB
Lift-off (microtechnology) process.svg 512 × 664; 31 KB
Lift-off-Verfahren (Fehlerbilder).svg 1,100 × 600; 44 KB
Lift-off-Verfahren (Halbleitertechnik).svg 1,024 × 756; 41 KB
Line cut location offset.png 417 × 442; 6 KB
Microprocessore silicio germano.jpg 250 × 324; 21 KB
Molecular Beam Epitaxy.png 1,400 × 739; 153 KB
Moore Kosten.png 943 × 665; 36 KB
OR2 layout.PNG 678 × 348; 19 KB
Organic transistor Greek.png 415 × 211; 95 KB
Overflow.svg 1,000 × 800; 24 KB
Overlay - typical model terms DE.svg 617 × 591; 16 KB
SADP challenge.png 504 × 497; 8 KB
Schottky-Transistor-Side.svg 364 × 204; 20 KB
Self-aligned silicidation.svg 1,990 × 692; 52 KB
SemiconductorProcessSize.png 1,440 × 852; 48 KB
Siliconchip by shapeshifter.png 1,276 × 891; 1.83 MB
Spacer formation (DE).svg 875 × 361; 14 KB
Two-bar challenge.png 601 × 351; 8 KB
Wafermap showing fully and partially patterned dies.svg 657 × 657; 103 KB
Worldwide Semiconductor Sales in Billion US-Dollar GERMAN.jpg 621 × 327; 27 KB

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