File:CMOS fabrication process.svg

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English: Simplified process of fabrication of a CMOS inverter on p-type substrate in semiconductor microfabrication. Note: Gate, source and drain contacts are not normally in the same plane in real devices, and the diagram can be scale.
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current16:29, 9 October 2011Thumbnail for version as of 16:29, 9 October 2011512 × 2,176 (7 KB)Cmglee (talk | contribs){{Information |Description ={{en|1=Simplified process of fabrication of a CMOS inverter on p-type substrate in semiconductor microfabrication. Note: Gate, source and drain contacts are not normally in the same plane in real devices, and the diagram is
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