File:4T SRAM Cell.png
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Summary
[edit]Description4T SRAM Cell.png |
English: A schematic of a four-transistor SRAM cell. The resistors are typically implemented in a special high-resistivity polysilicon layer. |
Date | |
Source | xfig |
Author | Cdkersey |
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[edit]I, the copyright holder of this work, hereby publish it under the following licenses:
Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A copy of the license is included in the section entitled GNU Free Documentation License.http://www.gnu.org/copyleft/fdl.htmlGFDLGNU Free Documentation Licensetruetrue |
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Date/Time | Thumbnail | Dimensions | User | Comment | |
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current | 02:30, 1 February 2013 | 910 × 567 (20 KB) | Cdkersey (talk | contribs) | Added a bit of blur to get rid of terrible-looking edges. | |
02:28, 1 February 2013 | 910 × 567 (14 KB) | Cdkersey (talk | contribs) | {{subst:Upload marker added by en.wp UW}} {{Information |Description = {{en|A schematic of a four-transistor SRAM cell. The resistors are typically implemented in a special high-resistivity polysilicon layer.}} |Source = xfig |Date = 2013.01.31 |Author... |
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Horizontal resolution | 31.5 dpc |
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Vertical resolution | 31.5 dpc |
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