File:Circuit of gated SR latch with asynchronous inputs.svg
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Size of this PNG preview of this SVG file: 496 × 319 pixels. Other resolutions: 320 × 206 pixels | 640 × 412 pixels | 1,024 × 659 pixels | 1,280 × 823 pixels | 2,560 × 1,646 pixels.
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| Description |
English: Circuit of gated SR latch with asynchronous inputs (IEC standard)
Español: Circuito de un biestable SR sincronizado por nivel alto con entradas asíncronas (simbología IEC) |
| Source | Own work |
| Author | Dizquierdol |
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I, the copyright holder of this work, hereby publish it under the following license:
 
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This file is made available under the Creative Commons CC0 1.0 Universal Public Domain Dedication. |
| The person who associated a work with this deed has dedicated the work to the public domain by waiving all of their rights to the work worldwide under copyright law, including all related and neighboring rights, to the extent allowed by law. You can copy, modify, distribute and perform the work, even for commercial purposes, all without asking permission.
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| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 08:15, 8 May 2011 | | 496 × 319 (7 KB) | Dizquierdol (talk | contribs) | Corrección de las letras negadas |
| 08:09, 8 May 2011 |  | 496 × 319 (7 KB) | Dizquierdol (talk | contribs) | {{Information |Description ={{en|1=Circuit of gated SR latch with asynchronous inputs (IEC standard)}} {{es|1=Circuito de un biestable SR sincronizado por nivel alto con entradas asíncronas (simbología IEC)}} |Source ={{own}} |Author |
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