File:Aufbau CMOS-Chip 2000er.svg

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Deutsch: Beispielhafter schematischer Aufbau eines CMOS-Chips, wie er Anfang der 2000er verwendet wird. Dargestellt werden LDD-MISFETs auf einem SOI-Siliciumsubstrat, fünf Metallisierungsebenen und ein Lotkontakt für die Flip-Chip-Kontaktierung. Außerdem sind die Arbeitsabschnitte FEOL (front-end of line), BEOL (back-end of line) sowie das Teile vom back-end bzw. packaging gekennzeichnet.
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Source Diverse Uni-Skripte & Fachzeitschriftenartikel
Author Cepheiden at German Wikipedia
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Cepheiden at the German-language Wikipedia, the copyright holder of this work, hereby publishes it under the following license:
GNU head Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A copy of the license is included in the section entitled GNU Free Documentation License.
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Transferred from de.wikipedia to Commons by Akkakk.

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  • 2006-12-06 15:09 Cepheiden 550×810× (86527 bytes) {{Information |Beschreibung=Beispielhafter schematischer Aufbau eines [[CMOS]]-Chips, wie er Anfang der 2000er verwendet wird. Dagestellt werden LDD-[[Feldeffekttransistor|MISFET]]s auf einem [[SOI]]-Siliciumsubstrat, fünf Metallisierungsebenen und ein L

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current15:15, 12 August 2011Thumbnail for version as of 15:15, 12 August 2011550 × 810 (84 KB)Akkakk (talk | contribs){{Information |Description={{de|Beispielhafter schematischer Aufbau eines de:CMOS-Chips, wie er Anfang der 2000er verwendet wird. Dargestellt werden LDD-MISFETs auf einem de:SOI-Siliciumsubstrat, fünf Metallisieru

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